Introduction

Forwarding Error Correction (FEC) is a technique used for controlling errors in data transmission over unreliable or noisy communication channels. The sender sends the data together with a certain redundant error correction code. When the data is received at the receiver’s end, it is checked according to the error correction code. If an error is found, the receiver recognizes it and corrects the error without data retransmission.

The FEC function can be applied to 100G, 40G and 25G ports of the switch and works only when all of the three following conditions are matched:

PICOS offers FEC algorithm RS-FEC (CL91) on 100G port and FEC BASE-R (CL74) on 40G port.

For 25G port, PICOS offers two different FEC algorithms on different switch platforms:

Trident 3, Maverick2, Helix5 and Tomahawk 2 platform switches support RS-FEC (CL74) mode, Tomahawk+/Tomahawk platform switches support RS-FEC (CL108) mode.

NOTE

The port can link up only when the FEC configurations and the FEC algorithm mode on both ends of the link are the same.

Configuring FEC Function

Procedure

       set interface gigabit-ethernet <interface-name> fec <true | false>

By default, FEC function is disabled on the 100G, 40G and 25G port of the switch.

Configuration Example

admin@Xorplus# set interface gigabit-ethernet xe-1/1/1 fec false
admin@Xorplus# commit
admin@Xorplus# set interface gigabit-ethernet xe-1/1/2 fec true
admin@Xorplus# commit

Verify the Configuration

admin@XorPlus# run show interface gigabit-ethernet xe-1/1/2
Physical interface: xe-1/1/2, Enabled, error-discard False, Physical link is Down
Interface index: 2, QSFP28 type: DAC, Mac Learning Enabled
Description:
Link-level type: Ethernet, MTU: 1514, Speed: Auto, Duplex: Full, FEC Enable: True
Source filtering: Disabled, Flow control: Disabled, Auto-negotiation: Disabled
Interface flags: Hardware-Down SNMP-Traps Internal: 0x0
Interface rate limit  ingress:unlimited, egress:unlimited
Link fault signaling  ignore local fault:false, ignore remote fault:false
force up mode:false
Precision Time Protocol mode:none
Current address: a8:2b:b5:e0:88:c7, Hardware address: a8:2b:b5:e0:88:c7
Traffic statistics:
  5 sec input rate 0 bits/sec, 0 packets/sec
  5 sec output rate 0 bits/sec, 0 packets/sec
  Input Packets............................0
  Output Packets...........................0
  Input Octets.............................0
  Output Octets............................0